ARM64从源码编译docker（v1.9.1)

发表于 2015-11-30 | 更新于 2018-11-25 | 分类于 aarch64 |

在X86_64机器fedora系统下，不要使用官方编译的rpm包，交叉编译bootstrap会出现异常，使用源码编译的go.

1.编译X86_64的go binary

cd /root
git clone https://github.com/golang/go
git checkout go1.4.2
cd src/
./make.bash //先编译一个go x86_64
mv /root/go /root/go1.4//因为go1.5beta代码固定了go路径

2.下载go1.5.1，使用go1.4为arm64交叉编译bootstrap，或者直接checkout go1.5.1

1 2	cd go/src/ GOOS=linux GOARCH=arm64 ./bootstrap.bash

3. 拷贝go-linux-arm64-bootstrap.tbz到Arm64机器上继续编译其他模块

scp go-linux-arm64-bootstrap.tbz xxx //
//下载go1.5.1代码
git checkout go1.5.1
cd go/src
GOROOT=/path/to/go/bootstrap
GOROOT_BOOTSTRAP=$GOROOT ./all.bash

4. 下载docker源码并编译

git clone https://github.com/jefby/docker.git
git checkout jefby-v1.9.1 //找到最新的v1.9.1版本
AUTO_GOPATH=1 ./hack/make.sh dynbinary //编译动态版本
./hack/make.sh binary //静态版本，根据github docker社区的评论，似乎是用Redhat系列不能用静态版本的，因为默认使用了devicemapper，而不是ubuntu使用的aufs

5. 需要安装glibc-static

在docker v1.9.1版本中，hack/make.sh dynbinary中依然依赖libc.a和libpthread.a库，所以需要安装glibc-static rpm包，提供这两个库~

6. 修改hack/make.sh增加set -x

添加调试选项，进行debug，查看到底是什么地方出现错误

7.安装必须的一些pkg

1 2	yum install -y device-mapper-devel yum install -y btrfs-progs-devel

8.docker pull 的时候提示错误Server error: Status 0 while fetching image layer

解决方法：
在/etc/hosts后面添加对docker网站的dns解析

1 2	162.242.195.84 index.docker.io 162.242.195.84 registry-1.docker.io

Applied Micro Mustang 支持kvm

发表于 2015-11-06 | 更新于 2018-11-25 | 分类于 aarch64 |

在mustang机器上安装了Centos7，并升级内核到4.1.0-0.rc2

kernel-version

但是dmesg发现并不支持kvm，

1
2
3

[    0.343796] kvm [1]: GICV size 0x2000 not a multiple of page size 0x10000
[    0.343802] kvm [1]: error: no compatible GIC info found
[    0.343909] kvm [1]: error initializing Hyp mode: -6

在这里有相关的patch，https://bugzilla.redhat.com/show_bug.cgi?id=1165290 ，但是打上补丁后虽然能够解决掉kvm的bug，但是又引入了新的问题，ethernet1和eth2识别不了，因为新的内核解析的时候需要增加对应的interrupt reg

patch

按照如下修改后即可，好用的mustang.dts如下：

/dts-v1/;

/ {
	model = "APM X-Gene Mustang board";
	compatible = "apm,mustang", "apm,xgene-storm";
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	interrupt-parent = <0x1>;

	pmu {
		interrupts = <0x1 0xc 0xff04>;
		compatible = "arm,armv8-pmuv3";
	};

	soc {
		compatible = "simple-bus";
		ranges;
		#address-cells = <0x2>;
		#size-cells = <0x2>;

		sata@1a800000 {
			reg = <0x0 0x1a800000 0x0 0x1000 0x0 0x1f230000 0x0 0x1000 0x0 0x1f23d000 0x0 0x1000 0x0 0x1f23e000 0x0 0x1000>;
			interrupts = <0x0 0x88 0x4>;
			compatible = "apm,xgene-ahci";
			dma-coherent;
			status = "ok";
		};

		serial@1c020000 {
			reg = <0x0 0x1c020000 0x0 0x1000>;
			interrupts = <0x0 0x4c 0x4>;
			reg-shift = <0x2>;
			compatible = "ns16550a";
			clock-frequency = <0x2faf080>;
			device_type = "serial";
			status = "ok";
			interrupt-parent = <0x1>;
		};

		serial@1c021000 {
			reg = <0x0 0x1c021000 0x0 0x1000>;
			interrupts = <0x0 0x4d 0x4>;
			reg-shift = <0x2>;
			compatible = "ns16550a";
			clock-frequency = <0x2faf080>;
			device_type = "serial";
			status = "disabled";
			interrupt-parent = <0x1>;
		};

		serial@1c022000 {
			reg = <0x0 0x1c022000 0x0 0x1000>;
			interrupts = <0x0 0x4e 0x4>;
			reg-shift = <0x2>;
			compatible = "ns16550a";
			clock-frequency = <0x2faf080>;
			device_type = "serial";
			status = "disabled";
			interrupt-parent = <0x1>;
		};

		serial@1c023000 {
			reg = <0x0 0x1c023000 0x0 0x1000>;
			interrupts = <0x0 0x4f 0x4>;
			reg-shift = <0x2>;
			compatible = "ns16550a";
			clock-frequency = <0x2faf080>;
			device_type = "serial";
			status = "disabled";
			interrupt-parent = <0x1>;
		};

		pcie@1f500000 {
			reg = <0x0 0x1f500000 0x0 0x10000 0xa0 0xd0000000 0x0 0x200000>;
			reg-names = "csr", "cfg";
			compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
			dma-coherent;
			device_type = "pci";
			clocks = <0x9 0x0>;
			#interrupt-cells = <0x1>;
			dma-ranges = <0x42000000 0x80 0x0 0x80 0x0 0x0 0x80000000 0x42000000 0x0 0x0 0x0 0x0 0x80 0x0>;
			ranges = <0x1000000 0x0 0x0 0xa0 0x10000000 0x0 0x10000 0x2000000 0x0 0x80000000 0xa1 0x80000000 0x0 0x80000000>;
			status = "disabled";
			#address-cells = <0x3>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0xd4 0x1 0x0 0x0 0x0 0x2 0x1 0x0 0xd5 0x1 0x0 0x0 0x0 0x3 0x1 0x0 0xd6 0x1 0x0 0x0 0x0 0x4 0x1 0x0 0xd7 0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			#size-cells = <0x2>;
		};

		pcie@1f510000 {
			reg = <0x0 0x1f510000 0x0 0x10000 0xc0 0xd0000000 0x0 0x200000>;
			reg-names = "csr", "cfg";
			compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
			dma-coherent;
			device_type = "pci";
			clocks = <0xa 0x0>;
			#interrupt-cells = <0x1>;
			dma-ranges = <0x42000000 0x80 0x0 0x80 0x0 0x0 0x80000000 0x42000000 0x0 0x0 0x0 0x0 0x80 0x0>;
			ranges = <0x1000000 0x0 0x0 0xc0 0x10000000 0x0 0x10000 0x2000000 0x0 0x80000000 0xc1 0x80000000 0x0 0x80000000>;
			status = "disabled";
			#address-cells = <0x3>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0xda 0x1 0x0 0x0 0x0 0x2 0x1 0x0 0xdb 0x1 0x0 0x0 0x0 0x3 0x1 0x0 0xdc 0x1 0x0 0x0 0x0 0x4 0x1 0x0 0xdd 0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			#size-cells = <0x2>;
		};

		pcie@1f2b0000 {
			reg = <0x0 0x1f2b0000 0x0 0x10000 0xe0 0xd0000000 0x0 0x200000>;
			reg-names = "csr", "cfg";
			compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
			dma-coherent;
			device_type = "pci";
			clocks = <0x6 0x0>;
			#interrupt-cells = <0x1>;
			dma-ranges = <0x42000000 0x80 0x0 0x80 0x0 0x0 0x80000000 0x42000000 0x0 0x0 0x0 0x0 0x80 0x0>;
			ranges = <0x1000000 0x0 0x0 0xe0 0x10000000 0x0 0x10000 0x2000000 0x0 0x80000000 0xe1 0x80000000 0x0 0x80000000>;
			status = "ok";
			#address-cells = <0x3>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0xc2 0x1 0x0 0x0 0x0 0x2 0x1 0x0 0xc3 0x1 0x0 0x0 0x0 0x3 0x1 0x0 0xc4 0x1 0x0 0x0 0x0 0x4 0x1 0x0 0xc5 0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			#size-cells = <0x2>;
		};

		pcie@1f2c0000 {
			reg = <0x0 0x1f2c0000 0x0 0x10000 0xd0 0xd0000000 0x0 0x200000>;
			reg-names = "csr", "cfg";
			compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
			dma-coherent;
			device_type = "pci";
			clocks = <0x7 0x0>;
			#interrupt-cells = <0x1>;
			dma-ranges = <0x42000000 0x80 0x0 0x80 0x0 0x0 0x80000000 0x42000000 0x0 0x0 0x0 0x0 0x80 0x0>;
			ranges = <0x1000000 0x0 0x0 0xd0 0x10000000 0x0 0x10000 0x2000000 0x0 0x80000000 0xd1 0x80000000 0x0 0x80000000>;
			status = "disabled";
			#address-cells = <0x3>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0xc8 0x1 0x0 0x0 0x0 0x2 0x1 0x0 0xc9 0x1 0x0 0x0 0x0 0x3 0x1 0x0 0xca 0x1 0x0 0x0 0x0 0x4 0x1 0x0 0xcb 0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			#size-cells = <0x2>;
		};

		pcie@1f2d0000 {
			reg = <0x0 0x1f2d0000 0x0 0x10000 0x90 0xd0000000 0x0 0x200000>;
			reg-names = "csr", "cfg";
			compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
			dma-coherent;
			device_type = "pci";
			clocks = <0x8 0x0>;
			#interrupt-cells = <0x1>;
			dma-ranges = <0x42000000 0x80 0x0 0x80 0x0 0x0 0x80000000 0x42000000 0x0 0x0 0x0 0x0 0x80 0x0>;
			ranges = <0x1000000 0x0 0x0 0x90 0x10000000 0x0 0x10000 0x2000000 0x0 0x80000000 0x91 0x80000000 0x0 0x80000000>;
			status = "disabled";
			#address-cells = <0x3>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0xce 0x1 0x0 0x0 0x0 0x2 0x1 0x0 0xcf 0x1 0x0 0x0 0x0 0x3 0x1 0x0 0xd0 0x1 0x0 0x0 0x0 0x4 0x1 0x0 0xd1 0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			#size-cells = <0x2>;
		};

		ethernet_old@17020000 {
			reg = <0x0 0x17020000 0x0 0x30 0x0 0x17020000 0x0 0x10000 0x0 0x17020000 0x0 0x20>;
			interrupts = <0x0 0x38 0x4 0x0 0x39 0x4 0x0 0x3a 0x4>;
			#clock-cells = <0x1>;
			devid = <0x8>;
			phyid = <0x3>;
			compatible = "apm,xgene-enet-old";
			local-mac-address = [00 01 73 02 0b 73];
			slave-name = "RGMII";
			dma-coherent;
			phy-mode = "rgmii";
			clocks = <0x15 0x0>;
			status = "ok";
			max-frame-size = <0x233a>;
		};

		dwusb@19000000 {
			reg = <0x0 0x19000000 0x0 0x100000>;
			interrupts = <0x0 0x89 0x4>;
			compatible = "xhci-platform";
			dma-coherent;
			status = "ok";
		};

		phy@1f21a000 {
			reg = <0x0 0x1f21a000 0x0 0x100>;
			apm,tx-eye-tuning = <0x2 0xa 0xa 0x2 0xa 0xa>;
			compatible = "apm,xgene-phy";
			#phy-cells = <0x1>;
			clocks = <0xb 0x0>;
			apm,tx-boost-gain = <0x2 0x3 0x3 0x2 0x3 0x3>;
			status = "ok";
			phandle = <0xf>;
			linux,phandle = <0xf>;
		};

		phy@1f22a000 {
			reg = <0x0 0x1f22a000 0x0 0x100>;
			apm,tx-eye-tuning = <0x1 0xa 0xa 0x2 0xa 0xa>;
			compatible = "apm,xgene-phy";
			#phy-cells = <0x1>;
			apm,tx-boost-gain = <0x1e 0x1e 0x1e 0x1e 0x1e 0x1e>;
			status = "ok";
			phandle = <0x11>;
			linux,phandle = <0x11>;
		};

		phy@1f23a000 {
			reg = <0x0 0x1f23a000 0x0 0x100>;
			apm,tx-eye-tuning = <0x2 0xa 0xa 0x2 0xa 0xa>;
			compatible = "apm,xgene-phy";
			#phy-cells = <0x1>;
			apm,tx-boost-gain = <0x1f 0x1f 0x1f 0x1f 0x1f 0x1f>;
			status = "ok";
			phandle = <0x13>;
			linux,phandle = <0x13>;
		};

		system-clk-controller@17000000 {
			reg = <0x0 0x17000000 0x0 0x400>;
			compatible = "apm,xgene-scu", "syscon";
			phandle = <0x16>;
			linux,phandle = <0x16>;
		};

		dwusb@19800000 {
			reg = <0x0 0x19800000 0x0 0x100000>;
			interrupts = <0x0 0x8a 0x4>;
			compatible = "xhci-platform";
			dma-coherent;
			status = "ok";
		};

		clocks {
			ranges;
			#address-cells = <0x2>;
			#size-cells = <0x2>;

			pcie1clk@1f2cc000 {
				reg = <0x0 0x1f2cc000 0x0 0x1000>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clocks = <0x4 0x0>;
				clock-output-names = "pcie1clk";
				status = "disabled";
				phandle = <0x7>;
				linux,phandle = <0x7>;
			};

			pcie2clk@1f2dc000 {
				reg = <0x0 0x1f2dc000 0x0 0x1000>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clocks = <0x4 0x0>;
				clock-output-names = "pcie2clk";
				status = "disabled";
				phandle = <0x8>;
				linux,phandle = <0x8>;
			};

			xge0clk@1f61c000 {
				reg = <0x0 0x1f61c000 0x0 0x1000>;
				csr-mask = <0x3>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clocks = <0x4 0x0>;
				clock-output-names = "xge0clk";
				phandle = <0x19>;
				linux,phandle = <0x19>;
			};

			sataphy1clk@1f21c000 {
				reg = <0x0 0x1f21c000 0x0 0x1000>;
				csr-offset = <0x4>;
				csr-mask = <0x0>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				enable-offset = <0x0>;
				enable-mask = <0x6>;
				clocks = <0x4 0x0>;
				clock-output-names = "sataphy1clk";
				status = "disabled";
				phandle = <0xb>;
				linux,phandle = <0xb>;
			};

			socplldiv2 {
				#clock-cells = <0x1>;
				compatible = "fixed-factor-clock";
				clock-names = "socplldiv2";
				clocks = <0x3 0x0>;
				clock-div = <0x2>;
				clock-output-names = "socplldiv2";
				phandle = <0x4>;
				clock-mult = <0x1>;
				linux,phandle = <0x4>;
			};

			rngpkaclk@17000000 {
				reg = <0x0 0x17000000 0x0 0x2000>;
				csr-offset = <0xc>;
				csr-mask = <0x10>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				enable-offset = <0x10>;
				enable-mask = <0x10>;
				clocks = <0x4 0x0>;
				clock-output-names = "rngpkaclk";
				phandle = <0x1a>;
				linux,phandle = <0x1a>;
			};

			sge0clk@1f21c000 {
				reg = <0x0 0x1f21c000 0x0 0x1000>;
				csr-mask = <0x3>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clocks = <0x4 0x0>;
				clock-output-names = "sge0clk";
				phandle = <0x18>;
				linux,phandle = <0x18>;
			};

			pcie3clk@1f50c000 {
				reg = <0x0 0x1f50c000 0x0 0x1000>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clocks = <0x4 0x0>;
				clock-output-names = "pcie3clk";
				status = "disabled";
				phandle = <0x9>;
				linux,phandle = <0x9>;
			};

			ethclk {
				reg = <0x0 0x17000000 0x0 0x1000>;
				#clock-cells = <0x1>;
				reg-names = "div-reg";
				divider-shift = <0x0>;
				divider-width = <0x9>;
				compatible = "apm,xgene-device-clock";
				clock-names = "ethclk";
				clocks = <0x4 0x0>;
				clock-output-names = "ethclk";
				divider-offset = <0x238>;
				phandle = <0x5>;
				linux,phandle = <0x5>;
			};

			pcppll@17000100 {
				reg = <0x0 0x17000100 0x0 0x1000>;
				type = <0x0>;
				#clock-cells = <0x1>;
				compatible = "apm,xgene-pcppll-clock";
				clock-names = "pcppll";
				clocks = <0x2 0x0>;
				clock-output-names = "pcppll";
			};

			qmlclk {
				reg = <0x0 0x1703c000 0x0 0x1000>;
				csr-offset = <0x0>;
				csr-mask = <0x3>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clock-names = "qmlclk";
				enable-offset = <0x8>;
				enable-mask = <0x3>;
				clocks = <0x4 0x0>;
				clock-output-names = "qmlclk";
				status = "ok";
				phandle = <0x14>;
				linux,phandle = <0x14>;
			};

			refclk {
				#clock-cells = <0x1>;
				compatible = "fixed-clock";
				clock-frequency = <0x5f5e100>;
				clock-output-names = "refclk";
				phandle = <0x2>;
				linux,phandle = <0x2>;
			};

			pcie4clk@1f51c000 {
				reg = <0x0 0x1f51c000 0x0 0x1000>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clocks = <0x4 0x0>;
				clock-output-names = "pcie4clk";
				status = "disabled";
				phandle = <0xa>;
				linux,phandle = <0xa>;
			};

			pcie0clk@1f2bc000 {
				reg = <0x0 0x1f2bc000 0x0 0x1000>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clocks = <0x4 0x0>;
				clock-output-names = "pcie0clk";
				status = "ok";
				phandle = <0x6>;
				linux,phandle = <0x6>;
			};

			socpll@17000120 {
				reg = <0x0 0x17000120 0x0 0x1000>;
				type = <0x1>;
				#clock-cells = <0x1>;
				compatible = "apm,xgene-socpll-clock";
				clock-names = "socpll";
				clocks = <0x2 0x0>;
				clock-output-names = "socpll";
				phandle = <0x3>;
				linux,phandle = <0x3>;
			};

			sata01clk@1f21c000 {
				reg = <0x0 0x1f21c000 0x0 0x1000>;
				csr-offset = <0x4>;
				csr-mask = <0x5>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				enable-offset = <0x0>;
				enable-mask = <0x39>;
				clocks = <0x4 0x0>;
				clock-output-names = "sata01clk";
				phandle = <0xe>;
				linux,phandle = <0xe>;
			};

			menetclk {
				reg = <0x0 0x1702c000 0x0 0x1000>;
				#clock-cells = <0x1>;
				reg-names = "csr-reg";
				compatible = "apm,xgene-device-clock";
				clock-names = "menetclk";
				clocks = <0x5 0x0>;
				clock-output-names = "menetclk";
				phandle = <0x15>;
				linux,phandle = <0x15>;
			};
		};

		rng@10520000 {
			reg = <0x0 0x10520000 0x0 0x100>;
			interrupts = <0x0 0x41 0x4>;
			compatible = "apm,xgene-rng";
			clocks = <0x1a 0x0>;
		};

		qmtm@17030000 {
			reg = <0x0 0x17030000 0x0 0x10000 0x0 0x10000000 0x0 0x400000>;
			interrupts = <0x0 0x40 0x4 0x0 0x3c 0x4>;
			#clock-cells = <0x1>;
			compatible = "apm,xgene-qmtm-lite";
			slave-name = "CPU_QMTM3";
			clocks = <0x14 0x0>;
			status = "ok";
		};

		oldsata@1a000000 {
			reg = <0x0 0x1a000000 0x0 0x1000 0x0 0x1f210000 0x0 0x10000>;
			phys = <0xf 0x0>;
			interrupts = <0x0 0x86 0x4>;
			compatible = "apm,xgene-ahci-sgmii";
			phy-names = "sata-6g";
			clocks = <0xe 0x0>;
			status = "disabled";
		};

		reboot@17000014 {
			mask = <0x1>;
			compatible = "syscon-reboot";
			offset = <0x14>;
			regmap = <0x16>;
		};

		oldsata@1a400000 {
			reg = <0x0 0x1a400000 0x0 0x1000 0x0 0x1f220000 0x0 0x10000>;
			phys = <0x11 0x0>;
			interrupts = <0x0 0x87 0x4>;
			compatible = "apm,xgene-ahci-sgmii";
			phy-names = "sata-6g";
			clocks = <0x10 0x0>;
			status = "ok";
		};

		oldsata@1a800000 {
			reg = <0x0 0x1a800000 0x0 0x1000 0x0 0x1f230000 0x0 0x10000>;
			phys = <0x13 0x0>;
			interrupts = <0x0 0x88 0x4>;
			compatible = "apm,xgene-ahci-pcie";
			phy-names = "sata-6g";
			clocks = <0x12 0x0>;
			status = "ok";
		};

		ethernet@17020000 {
			reg = <0x0 0x17020000 0x0 0xd100 0x0 0x17030000 0x0 0xc300 0x0 0x10000000 0x0 0x200>;
			interrupts = <0x0 0x3c 0x4>;
			phy-handle = <0x17>;
			reg-names = "enet_csr", "ring_csr", "ring_cmd";
			compatible = "apm,xgene-enet";
			local-mac-address = [00 01 73 02 0b 73];
			dma-coherent;
			clocks = <0x15 0x0>;
			status = "ok";
			phy-connection-type = "rgmii";

			mdio {
				compatible = "apm,xgene-mdio";
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				menetphy@3 {
					reg = <0x3>;
					compatible = "ethernet-phy-id001c.c915";
					phandle = <0x17>;
					linux,phandle = <0x17>;
				};
			};
		};

		ethernet@1f210000 {
			reg = <0x0 0x1f210000 0x0 0xd100 0x0 0x1f200000 0x0 0xc300 0x0 0x1b000000 0x0 0x200>;
			interrupts = <0x0 0xa0 0x4 0x0 0xa1 0x4>;
			reg-names = "enet_csr", "ring_csr", "ring_cmd";
			compatible = "apm,xgene1-sgenet";
			local-mac-address = [00 00 00 00 00 00];
			dma-coherent;
			clocks = <0x18 0x0>;
			status = "ok";
			phy-connection-type = "sgmii";
		};

		ethernet@1f610000 {
			reg = <0x0 0x1f610000 0x0 0xd100 0x0 0x1f600000 0x0 0xc300 0x0 0x18000000 0x0 0x200>;
			interrupts = <0x0 0x60 0x4 0x0 0x61 0x4>;
			reg-names = "enet_csr", "ring_csr", "ring_cmd";
			compatible = "apm,xgene1-xgenet";
			local-mac-address = [00 00 00 00 00 00];
			dma-coherent;
			clocks = <0x19 0x0>;
			status = "ok";
			phy-connection-type = "xgmii";
		};

		sata@1a000000 {
			reg = <0x0 0x1a000000 0x0 0x1000 0x0 0x1f210000 0x0 0x1000 0x0 0x1f21d000 0x0 0x1000 0x0 0x1f21e000 0x0 0x1000 0x0 0x1f217000 0x0 0x1000>;
			phys = <0xf 0x0>;
			interrupts = <0x0 0x86 0x4>;
			compatible = "apm,xgene-ahci";
			dma-coherent;
			phy-names = "sata-phy";
			clocks = <0xe 0x0>;
			status = "disabled";
		};

		sata@1a400000 {
			reg = <0x0 0x1a400000 0x0 0x1000 0x0 0x1f220000 0x0 0x1000 0x0 0x1f22d000 0x0 0x1000 0x0 0x1f22e000 0x0 0x1000 0x0 0x1f227000 0x0 0x1000>;
			interrupts = <0x0 0x87 0x4>;
			compatible = "apm,xgene-ahci";
			dma-coherent;
			status = "ok";
		};
	};

	cpus {
		#address-cells = <0x2>;
		#size-cells = <0x0>;

		cpu@000 {
			reg = <0x0 0x0>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0x8008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};

		cpu@001 {
			reg = <0x0 0x1>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0x9008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};

		cpu@100 {
			reg = <0x0 0x100>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0xa008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};

		cpu@101 {
			reg = <0x0 0x101>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0xb008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};

		cpu@200 {
			reg = <0x0 0x200>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0xc008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};

		cpu@201 {
			reg = <0x0 0x201>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0xd008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};

		cpu@300 {
			reg = <0x0 0x300>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0xe008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};

		cpu@301 {
			reg = <0x0 0x301>;
			compatible = "apm,potenza", "arm,armv8";
			cpu-release-addr = <0x40 0xf008>;
			enable-method = "spin-table";
			device_type = "cpu";
		};
	};

	timer {
		interrupts = <0x1 0x0 0xff01 0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xf 0xff01>;
		compatible = "arm,armv8-timer";
		clock-frequency = <0x2faf080>;
	};

	aliases {
		ethernet0 = "/soc/ethernet@17020000";
	};

	interrupt-controller@78010000 {
		reg = <0x0 0x78090000 0x0 0x10000 0x0 0x780a0000 0x0 0x20000 0x0 0x780c0000 0x0 0x10000 0x0 0x780e0000 0x0 0x20000>;
		interrupts = <0x1 0x9 0xf04>;
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <0x3>;
		phandle = <0x1>;
		interrupt-controller;
		linux,phandle = <0x1>;
	};
};

使用方法如下：

1 2	sudo yum install -y dtc dtc -I dts mustang.dts -O dtb -o /boot/mustang.dtb

随后修改/boot/efi/EFI/centos/grub.cfg中修改第一个entry，添加

devicetree /mustang.dtb

并重启即可~

AArch64简介

发表于 2015-08-29 | 更新于 2018-11-25 | 分类于 aarch64 |

about aarch64

Focus on high performance
Exception levels instead of different modes
virtualisation support built-in
32 bit fixed length instruction
more registers
divide instruction
compare & jump instruction
support for aarch32

difference towards aarch32

no thumb mode
only a handful conditionally executing instruction
no more coprocessor
beware PC relative addressing doesn’t have an offset anymore
31 general purpose registers.1 special purpose
no store/load multiple registers(only pairs)

aarch64 registers

registers	special	description
SP/ZR				Stack pointor/Zero register
30			LR		Link register
29			FP		Frame pointer
19~28				stored/restored by callee
18					platforem specific register
17					inter procedure call 1
16					inter procedure call 2
9~15				scratch registers
8					indirect result(pointer to sturct)
0~7					parameters & results

registers can be accessed as 32/64 bit

X0~30 for 64 bit
W0~30 for 32 bit
Also available
V0~31,SIMD floating point registers

Modes AArch32

User Application
FIQ Fast Interrupt
IRQ Interrupt
Supervisor Operating System
Abort Prefetch abort of instructiion/data
Undefined After undefined instruction
System Privileged user mode (for OS functions)
Monitor On TrustZone Platforms

Modes on Aarch64

EL0 Unprivileged,applications(with task protection,etc)
EL1 Operating system,kernel,etc
EL2 Hypervisor(for virtualisation)
EL3 Secure monitor(for switching to/from secure state)

svc,hvc,smc指令切换，对EL1~3有三种不同的中断向量，客户端可以生产virtual exceptions

CP15 is no more

Cache,address and TLB management now have dedicated instructions

Memory management

Execpt for EL0,all exception levels have their own memory translation

context(EL0 is managed by EL1)

This means up to 3 stage translation depending on the context

UEFI&ACPI

http://www.uefi.org/sites/default/files/resources/S4_BldgARMServers_UEFILinuxCon_FINAL_Aug.%2021.pdf

Fedora22 image for arndale octa board

发表于 2015-07-19 | 更新于 2018-11-25 | 分类于 Linux |

Hello,everynoe.

I have made an image based Fedora 22 for arndale octa board.

Offical arndale octa board just provides the linaro ubuntu linux release , but i’m more familiar RHEL/Fedora/CentOS series,,so i take some time to port the fedora 22 to this board, and it works very good.

The image file is very easy to use,and supposes that you use the linux/mac osx ,you just insert your tf card, open the terminal and input follow commands:

dd if=Fedora22-arndale-octa-1G.img of=/dev/sdX bs=1M

when it dones,poll out the tf card and insert it to the board,boot it and it will work ok .Maybe you should upgrade the kernel and dtb files because the new 4.1-rc8 kernel is more efficient and good.please command follow:

1
2
3

mount /dev/mmcblk1p2 /media
cp uImage /media/
cp board.dtb /media/

Besides:

为Fedora21 aarch64制作RPM包（tengine）

发表于 2015-04-08 | 更新于 2018-11-25 | 分类于 aarch64 |

本文简单记录将tengine-2.10版本源码打为rpm包的步骤，此处是简单的封装了下二进制，没有做复杂的脚本配置和gpg校验等，待以后有时间继续研究。
1.安装必要包

1	$yum install -y gcc pcre-devel openssl-devel

2.创建tengine rpm构建目录，使用非root用户

1 2	$su - jefby $mkdir -p tengine_rpm/{BUILD,RPMS,SOURCES,SPECS,SRPMS}

3.编写spec文件，将源码放置到SOURCES目录下

$unzip tengine-master.zip
$mv tengine-master tengine-2.10
$tar -cjvf tengine-2.10.tar.bz2 tengine-2.10
$mv tengine-2.10.tar.bz2 SOURCES
$vi SPECS/tengine.spec

tengine.spec文件详细内容：

# This is a sample spec file for tengine

%define _topdir         /home/jefby/tengine_rpm
%define name            tengine
%define release         2
%define version         2.10
%define buildroot       %{_topdir}/%{name}-%{version}-root

BuildRoot:              %{buildroot}
Summary:                TAOBAO Tengine
License:                GPL
Name:                   %{name}
Version:                %{version}
Release:                %{release}
Source:                 %{name}-%{version}.tar.bz2
Prefix:                 /usr/local
Group:                  Development/Tools
BuildRequires:          gcc,make
Requires:               pcre,pcre-devel,openssl,openssl-devel,chkconfig >= 1.1.1

%description
Tengine is the webserver based nginx for taobao website

%prep #编译前准备，主要是解压缩源码，并进入压缩后的目录
%setup -q

%build #编译
./configure --prefix=/opt/nginx
make %{?_smp_mflags} #检查处理器核心数目，若为多核则使用多核编译

%install #安装，如果不设置DESTDIR，默认安装到prefix指定的目录
rm -rf %{buildroot}
make install DESTDIR=%{buildroot}


#%post  #rpm安装后执行的脚本

#%preun #卸载前执行的脚本

#%postun #卸载后执行的脚本

%clean #清理，检查buildroot是否为根目录，如果不是直接删除
[ %{buildroot} != '/' ] && rm -rf %{buildroot}

%files #打包到rpm的文件，因为prefix指定为/opt/nginx，此时将整个文件夹打包
/opt/nginx
%defattr(-,root,root)#设置属性

目录结构

$tree .
├── BUILD
├── RPMS
├── SOURCES
│   └── tengine-2.10.tar.bz2
├── SPECS
│   └── tengine.spec
└── SRPMS

说明：
BUILD 源代码解压后的存放目录
RPMS 制作完成后的RPM包存放目录，里面有与平台相关的子目录
SOURCES 软件源码及补丁
SPECS SPEC文件存放目录
SRMPS 存放SRMPS生成的目录
4.编译制作rpm包

$rpmbuild -v -ba --clean SPEC/tengine.spec
其中-v表示Verbose，输出详细信息
-bb：构建二进制RPM包
-ba：构建二进制RPM和源码src.RPM包
-bp：运行到pre结束
-bc：执行到build结束
-bi：运行到install结束
-bl：检查有文件没包含
一般使用bb或者ba
--clean：
Remove the build tree after the packages are made.

成功会在RPMS目录下生成
tengine-xxx.rpm和tengine-debuginfo-xxx.rpm包，在SRPMS目录下生成src.rpm包

├── BUILD
├── RPMS
│   └── aarch64
│       ├── tengine-2.10-2.aarch64.rpm
│       └── tengine-debuginfo-2.10-2.aarch64.rpm
├── SOURCES
│   └── tengine-2.10.tar.bz2
├── SPECS
│   └── tengine.spec
└── SRPMS
    └── tengine-2.10-2.src.rpm

如此，RPM便制作OK，可以添加到私有repo中(暂时关闭掉gpg校验)，或者直接使用rpm方式安装：

1	$rpm -ivh tengine-2-10-2.aarch64.rpm

补充：
查看spec文件已定义的一些宏，可以搜索文件

1	$cat /usr/lib/rpm/macro

在PC-Linux下运行Qemu模拟AArch64硬件调试内核

发表于 2015-04-06 | 更新于 2018-11-25 | 分类于 aarch64 |

参考链接：
http://www.bennee.com/~alex/blog/2014/05/09/running-linux-in-qemus-aarch64-system-emulation-mode/

环境说明：
Fedora21 x86_64

ARM公司推出ARM V8架构后，全面进入64位CPU时代，可是目前市场上出现的设备太少或者说性价比不高，但是又想做相关平台下的开发，那么可以考虑下使用qemu模拟器

安装aarch64-qemu：

1	$sudo yum install -y qemu-system-aarch64

如果想快速使用模型，可以下载这个镜像：
http://people.linaro.org/~alex.bennee/images/aarch64-linux-3.15rc2-buildroot.img
然后运行命令：

1	$qemu-system-aarch64 -machine virt -cpu cortex-a57 -machine type=virt -nographic -smp 1 -m 2048 -kernel aarch64-linux-3.15rc2-buildroot.img --append "console=ttyAMA0"

输入root，免密码登陆：
查看配置
当然还可能需要使用qemu来调试Linux内核，那么需要使用buildroot来构建根文件系统，然后再次配置编译内核，最后启动gdb连接到gdbserver上来进行内核调试和分析：
1.下载和编译buildroot
(1)下载buildroot，2015-02稳定版
http://buildroot.uclibc.org/download.html
(2)配置和编译

1
2
3

$tar -xjvf buildroot-2015.02.tar.bz2
$cd buildroot-2015.02
$make menuconfig

选用externel cross-compiler，Linaro 14.09，选择安装路径，然后到Linaro官网下载对应的编译器，不要使用yum来安装对应的编译器，因为红帽公司打包的交叉编译器缺少kernel头文件，我把我的配置文件放到了百度网盘，可以参考：
http://pan.baidu.com/s/176ef0
Linaro 14.09交叉编译器的链接地址：
https://releases.linaro.org/14.09/components/toolchain/binaries
下载gcc-linaro-aarch64-linux-gnu-4.9-2014.09_linux.tar.bz2，解压缩到目录/opt/，修改名称并再buildroot中配置路径，然后编译，顺利的话会在目录output/images/生成rootfs.cpio文件，即为根文件系统。
(3)下载并配置编译内核
到kernel.org下载最新版内核，配置initramfs使用buildroot生成的根文件系统，配置架构和交叉工具，编译

1 2	$ARCH=arm64 make menuconfig $ARCH=arm64 make -j 8

参考配置文件：
http://pan.baidu.com/s/1i35pWwP
成功会在arch/arm64/boot/目录生成Image文件，然后使用以下命令启动：

1	$qemu-system-aarch64 -machine virt -cpu cortex-a57 -machine type=virt -nographic -smp 1 -m 2048 -kernel /home/jefby/linux-3.19.3/arch/arm64/boot/Image --append "console=ttyAMA0"

(4)调试内核

1	$ qemu-system-aarch64 -s -S -machine virt -cpu cortex-a57 -machine type=virt -nographic -smp 1 -m 2048 -kernel /home/jefby/linux-3.19.3/arch/arm64/boot/Image --append "console=ttyAMA0"

此时内核启动，并使用gdbserver打开了1234端口供gdb客户端连接，本地打开terminal，输入以下命令：

$cd linux-3.19.3
$aarch64-linux-gnu-gdb
$file vmlinux
$target remote localhost:1234
$b start_kernel
$c
$n

如图所示：
这里写图片描述

dnsmasq TFTP directory /tftpd inaccessible: Permission denied

发表于 2015-03-25 | 更新于 2018-11-25 | 分类于 Linux |

调试pxe的时候碰到了如下问题”dnsmasq TFTP directory /tftpd inaccessible: Permission denied”，记录下解决步骤:

背景

在fedora21 server版本中配置dnsmasq作为tftp服务器，修改配置文件/etc/dnsmasq.conf，增加如下选项：

1 2	enable-tftp tftp-root=/tftpd

在根目录下创建文件夹tftpd，修改属主为nobody:nobody，然后启动dnsmasq服务器，总是不能启动起来，错误信息如下：

Mar 25 16:54:35 localhost dnsmasq[1787]: TFTP directory /tftpd inaccessible: Permission denied
Mar 25 16:54:35 localhost dnsmasq[1787]: FAILED to start up
Mar 25 16:54:35 localhost systemd: dnsmasq.service: main process exited, code=exited, status=3/NOTIMPLEMENTED
Mar 25 16:54:35 localhost systemd: Unit dnsmasq.service entered failed state.
Mar 25 16:54:35 localhost systemd: dnsmasq.service failed.

解决

刚开始以为是tftpd文件夹的权限问题，就将它设置为777，重启仍然报错，最后思考了下会不会是SELinux所致，默认fedora安装完成后SELINUX的状态为enforcing，关闭SELINUX，重启OK，还真是这个原因！！！建议默认情况下关闭SELinux，方法有两种：

暂时关闭

1	setenforce 0

永久关闭

1	vim /etc/selinux/config修改enforcing为disable，重启服务器

dnsmasq启动OK的输出：

Mar 25 17:09:12 localhost dnsmasq[2131]: started, version 2.72 cachesize 150
Mar 25 17:09:12 localhost dnsmasq[2131]: compile time options: IPv6 GNU-getopt DBus no-i18n IDN DHCP DHCPv6 no-Lua TFTP no-conntrack ipset auth DNSSEC loop-detect
Mar 25 17:09:12 localhost dnsmasq-dhcp[2131]: DHCP, IP range 192.168.0.50 -- 192.168.0.150, lease time 12h
Mar 25 17:09:12 localhost dnsmasq-tftp[2131]: TFTP root is /tftpd
Mar 25 17:09:12 localhost dnsmasq[2131]: reading /etc/resolv.conf
Mar 25 17:09:12 localhost dnsmasq[2131]: read /etc/hosts - 2 addresses

Linux用户空间和内核空间通信方式比较

发表于 2014-09-21 | 更新于 2018-11-25 | 分类于 Linux |

资料整理：

论文，主要比较通信方式
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5696027
stackoverflow部分讨论

http://stackoverflow.com/questions/8145943/communication-between-linux-kernel-and-user-space-program

论文，主要讨论netlink

http://1984.lsi.us.es/~pablo/docs/spae.pdf

介绍netlink的一篇博文，写的不错！

http://www.cnblogs.com/iceocean/articles/1594195.html

摘抄自4的博文：

netlink 相对于系统调用，ioctl 以及 /proc 文件系统而言具有以下优点：

1，为了使用 netlink，用户仅需要在 include/linux/netlink.h 中增加一个新类型的 netlink 协议定义即可，如 #define NETLINK_MYTEST 17 然后，内核和用户态应用就可以立即通过 socket API 使用该 netlink 协议类型进行数据交换。但系统调用需要增加新的系统调用，ioctl 则需要增加设备或文件，那需要不少代码，proc 文件系统则需要在/proc下添加新的文件或目录，那将使本来就混乱的 /proc 更加混乱。

netlink是一种异步通信机制，在内核与用户态应用之间传递的消息保存在socket缓存队列中，发送消息只是把消息保存在接收者的socket的接收队列，而不需要等待接收者收到消息，但系统调用与 ioctl 则是同步通信机制，如果传递的数据太长，将影响调度粒度。

3．使用 netlink 的内核部分可以采用模块的方式实现，使用 netlink 的应用部分和内核部分没有编译时依赖，但系统调用就有依赖，而且新的系统调用的实现必须静态地连接到内核中，它无法在模块中实现，使用新系统调用的应用在编译时需要依赖内核。

4．netlink支持多播，内核模块或应用可以把消息多播给一个netlink组，属于该neilink 组的任何内核模块或应用都能接收到该消息，内核事件向用户态的通知机制就使用了这一特性，任何对内核事件感兴趣的应用都能收到该子系统发送的内核事件，在后面的文章中将介绍这一机制的使用。

5．内核可以使用 netlink 首先发起会话，但系统调用和 ioctl 只能由用户应用发起调用。

6．netlink 使用标准的 socket API，因此很容易使用，但系统调用和 ioctl则需要专门的培训才能使用。

jefby

arm linux内核源码中关于何时开启MMU的思考

发表于 2014-08-25 | 更新于 2018-11-25 | 分类于 aarch64 |

今天再次阅读arm linux内核源码，看MMU启动部分发现了一个问题，就是在常规的enable_mmu和turn_mmu_on部分我没有找到真正使能MMU标志的代码，但是它到底是什么时候将MMU的最低位置1的呢？？怀着这个疑问我在google上搜索了好多，但是对于这个问题的解答都是模凌两可，说的特别含糊，千篇一律，不能让人信服。

__enable_mmu代码如下：

__enable_mmu:

#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6

orr r0, r0, #CR_A

#else

bic r0, r0, #CR_A

#endif

#ifdef CONFIG_CPU_DCACHE_DISABLE

bic r0, r0, #CR_C

#endif

#ifdef CONFIG_CPU_BPREDICT_DISABLE

bic r0, r0, #CR_Z

#endif

#ifdef CONFIG_CPU_ICACHE_DISABLE

bic r0, r0, #CR_I

#endif

#ifndef CONFIG_ARM_LPAE

mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \

domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \

domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \

domain_val(DOMAIN_IO, DOMAIN_CLIENT))

mcr p15, 0, r5, c3, c0, 0 @ load domain access register

mcr p15, 0, r4, c2, c0, 0 @ load page table pointer

#endif

b __turn_mmu_on

ENDPROC(__enable_mmu)

__turn_mmu_on源码如下：

ENTRY(__turn_mmu_on)

mov r0, r0

instr_sync

mcr p15, 0, r0, c1, c0, 0 @ write control reg(启用MMU)

mrc p15, 0, r3, c0, c0, 0 @ read id reg

instr_sync

mov r3, r3

mov r3, r13 @r3中转入最后要跳入的虚拟地址

mov pc, r3 @跳转到__mmap_switched

__turn_mmu_on_end:

在turn_mmu_on中将r0的值写入协处理CP15的C1寄存器中，但是r0的bit0什么时候被置位了呢？？enable_mmu没有置位，那就肯定是在__enable_mmu之前，搜索代码找到了答案：

::arch/arm/mm/proc-v6.S

其实在__v6_setup中设置的，有一段代码如下：

1
2
3

adr r5,v6_crval @将v6_crval的实际运行地址加载到r5处
ldmia r5,{r5,r6}@将r5地址处的两个字内容保存到r5和r6处，根据v6_crval定义可知，值为clear和mmuset，mmmuset的最后一个比特值为1，也就是CR_M=1
orr r0,r0,r6 @在此处将设置r0的bit0为1。随后在__turn_mmu_on中将MMU的值写入CP15的C1寄存器，真正使能MMU。

v6_crval的定义如下：


.type v6_crval, #object

v6_crval: crval clear=0x01e0fb7f, mmuset=0x00c0387d, ucset=0x00c0187c

其中crval是定义的宏，根据配置CONFIG_MMU不同存放不同的值.


.macro crval, clear, mmuset, ucset

#ifdef CONFIG_MMU

 .word \clear
 .word \mmuset

#else

 .word \clear
 .word \ucset

#endif                                                                                                         .endm

至此就非常清楚了，在v6_setup中设置了r0的bit0，然后调用enable_mmu和__turn_mmu_on真正开启MMU。

wndr3800 实现USB设备自动挂载

发表于 2014-05-23 | 更新于 2018-11-25 | 分类于 Linux |

WNDR3800路由器有USB2.0接口，但是插上USB存储设备后，并没有像在Linux下那样，在/dev目录下有诸如sda,sdb等设备名，所以也不能提供设备访问。那么需要重新编译内核以支持设备的自动探测和对NTFS，EXT4分区的支持。具体步骤如下：

进入trunk目录下，运行make menuconfig配置内核：

配置BASE System => block mount选项，选中
配置Kernel Modules => Block Devices => kmod-scsi-generic
配置对文件系统的支持,NTFS（windows下常用）和EXT4（Linux下用）

Kernel Modules => File System => kmod-fs-ext4
NTFS支持，需要安装软件包ntfs-3g
配置 Utilities=> Filesystem =>ntfs-3g
保存退出，重新编译内核，并烧写系统到路由器中，使用ssh连接到路由器上，再次插入U盘，可以看到内核提示信息，然后使用mount命令挂载：
测试对NTFS分区的支持
同样插入一个格式为NTFS分区的U盘或者移动硬盘